SRAM cache looks like a possibility.

I am still looking at the system issues, but it looks like it is possible to get an external cache on the NeXT in the same way that the Nitro did. There are a few things that I am still looking into, such as if I can do some bus overclocking (relative to the NeXT bus). I found a document called the "MC68040 Designer's Handbook" that has an example cache scheme. Mine is a little different; however, it's good to know that my notes aligned with what Motorola did.

Handbook is in as of SVN rev 37.